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Smaller components such as pegs and other 3 input AND gates can still occupy the adjacent tile. But other components that take up a full tile will need to be moved over.
Smaller components such as pegs and other 3 input AND gates can still occupy the adjacent tile. But other components that take up a full tile will need to be moved over.
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Revision as of 00:58, 8 September 2025

AND gate

AND gate with two inputs
Component info
Internal ID MHG.AndGate
Configurable Yes
Input and output
Input count Adjustable from 2 to 4
Output count 1
Propagation delay 1 tick

The AND gate is a basic digital logic component whose output will be ON if all its inputs are ON.

For a 2 input AND gate, it is 1 tile wide and 1 tile tall, and its body is 1 tile long, but its inputs and outputs extend its area to 3 tiles.

Logic

The AND gate's output will only be active if all of its inputs are ON. This is true no matter how many inputs the AND gate has.

AND Gate Truth Table (2 inputs)
Input 1Input 2Output
000
010
100
111

AND Gate Truth Table (3 inputs)
Input 1Input 2Input 3Output
0000
0010
0100
0110
1000
1010
1100
1111

AND Gate Truth Table (4 inputs)
Input 1Input 2Input 3Input 4Output
00000
00010
00100
00110
01000
01010
01100
01110
10000
10010
10100
10110
11000
11010
11100
11111

Timing

A demonstration of two AND gates being activated. The top AND gate has both its inputs active, but its output is not yet active because a delay of 1 tick has not yet passed. The bottom AND gate has had both its inputs active for at least 1 tick, and its output is therefore active.

The AND gate has a latency of 1 tick, so in the instance when all inputs are ON, the output will become active 1 tick later. As demonstrated in the example on the right.

Configurability

Pressing the edit button on an AND gate allows you to change the number of inputs it has. You can select 2, 3, or 4 inputs.

Changing the number of inputs on an AND gate does not change its latency, but it does make the components bigger, with their width changing from 1 tile wide with 2 inputs to a little less than 2 tiles wide with 3 inputs, to 2 tiles wide with 4 inputs.

Note that when an AND gate has 3 inputs, while its width is less than 2 tiles, the component is centered on a tile, causing it to require 3 tiles of width.

Smaller components such as pegs and other 3 input AND gates can still occupy the adjacent tile. But other components that take up a full tile will need to be moved over.