User:D4VID: Difference between revisions
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== Builds == | == Builds == | ||
* RISC-V 32 bit CPU (the base I set of instructions) - rv32i | * RISC-V 32 bit CPU (the base I set of instructions) - rv32i ([https://discord.com/channels/401255675264761866/1451697694593781831 post],[https://youtu.be/2siGxPkt9ww video],[https://logic.world/creations/worlds/b4eSnj/32-bit-risc-v-cpu world]) | ||
== Other projects == | == Other projects == | ||
* Mod Manager: https://gitea.d4vid.xyz/LogicWorldMods/LogicWorldModManager/ | |||
* A Rust library for creating subassembly files programmatically: https://gitea.d4vid.xyz/D4VID/logicworld-subassembly | * A Rust library for creating subassembly files programmatically: https://gitea.d4vid.xyz/D4VID/logicworld-subassembly | ||
* A [[wikipedia:Verilog|Verilog]] to LogicWorld compiler: https://gitea.d4vid.xyz/D4VID/verilog2logicworld (WIP) | * A [[wikipedia:Verilog|Verilog]] to LogicWorld compiler: https://gitea.d4vid.xyz/D4VID/verilog2logicworld (WIP) | ||
Latest revision as of 16:32, 31 December 2025
Don't have enough time to do what I want to do, but I did some things:
Mods
I use my own self-hosted Gitea instance to host my mods:
- Console Improvements
- DLatchPoke
- CameraRoll (WIP)
- CriticalPathAnalyzer (WIP)
Builds
Other projects
- Mod Manager: https://gitea.d4vid.xyz/LogicWorldMods/LogicWorldModManager/
- A Rust library for creating subassembly files programmatically: https://gitea.d4vid.xyz/D4VID/logicworld-subassembly
- A Verilog to LogicWorld compiler: https://gitea.d4vid.xyz/D4VID/verilog2logicworld (WIP)