Jump to content

D Latch: Difference between revisions

From Logic World Wiki
use truth table template
m remove dash
Line 8: Line 8:
| inputs=Data,Enable
| inputs=Data,Enable
| outputs=1
| outputs=1
| caption=D-Latch Truth Table
| caption=D Latch Truth Table
| 0 0 *
| 0 0 *
| 0 1 0
| 0 1 0

Revision as of 01:57, 7 September 2025

D Latch

D Latch
Component info
Internal ID MHG.DLatch
Configurable No
Input and output
Input count 2
Output count 1
Propagation delay 1 tick

The D Latch is a basic digital component who's output can be latched to the input when the latch pin is set to HIGH.

The D Latch has an input on the side (data), an input on the top (enable), and an output on the top. The input on the side is a state to be latched; while the enable input is HIGH, the output state will be latched to the input's state.

The D Latch will demonstrate the following behavior, where * represents the previous state:

D Latch Truth Table
DataEnableOutput
00*
010
10*
111

Timing

The D Latch has a latency of 1 tick, so in the instance when the enable pin is HIGH, the output will become latched to the data input 1 tick later.

Configurability

This component cannot be configured in the edit menu.