Jump to content

D Latch

From Logic World Wiki
Revision as of 01:54, 7 September 2025 by Felipe (talk | contribs) (use truth table template)
D Latch

D Latch
Component info
Internal ID MHG.DLatch
Configurable No
Input and output
Input count 2
Output count 1
Propagation delay 1 tick

The D Latch is a basic digital component who's output can be latched to the input when the latch pin is set to HIGH.

The D Latch has an input on the side (data), an input on the top (enable), and an output on the top. The input on the side is a state to be latched; while the enable input is HIGH, the output state will be latched to the input's state.

The D Latch will demonstrate the following behavior, where * represents the previous state:

D-Latch Truth Table
DataEnableOutput
00*
010
10*
111

Timing

The D Latch has a latency of 1 tick, so in the instance when the enable pin is HIGH, the output will become latched to the data input 1 tick later.

Configurability

This component cannot be configured in the edit menu.